This highly-cited invited paper by Handel and Tournier, published in Proceedings of the IEEE, addresses nanoscale engineering for reducing phase noise in electronic devices. The comprehensive review examines design principles and fabrication techniques for minimizing phase noise in nanoscale transistors, oscillators, and integrated circuits through quantum 1/f noise optimization, discussing material selection, device geometry, doping profiles, and circuit architectures that exploit quantum effects to achieve superior frequency stability in communications, timing, and sensing applications.